1. Field of the Invention
The present invention generally relates to the fabrication of semiconductor-on-insulator composite substrates, such as silicon-on-sapphire (SOS), and, more particularly, to a process of forming a substantially monocrystalline silicon epitaxial layer having a highly controlled defect density profile and containing an extremely low concentration of substrate-originated contaminants, such as aluminum when a sapphire substrate is utilized.
2. Description of the Prior Art
The advantages of utilizing a composite substrate comprised of a monocrystalline semiconductor layer, such a silicon, epitaxially deposited on a supporting insulative substrate are well recognized. These advantages include the substantial reduction of parasitic capacitance between charged active regions and the substrate and the effective elimination of leakage currents flowing between adjacent active devices. This is accomplished by employing as the substrate an insulative material with a high dielectric constant, such as sapphire (Al.sub.2 O.sub.3), and providing that the conducton path of any interdevice leakage current must pass through the substrate.
At the present, all previous attempts to practically realize an "ideal" silicon-on-insulator composite substrate have been frustrated by a number of significant problems. The simplest "ideal" composite substrate would include a completely monocrystalline, defect-free silicon layer of sufficient thickness to accommodate the fabrication of active devices therein. The silicon layer would be adjacent a highly insulative supporting substrate and would have a minimum of crystal lattice discontinuities at the silicon-substrate interface. As will be explained in greater detail below, a substantially more compex composite substrate, with the silicon layer containing a particular defect density profile, may actually be preferred over the simple "ideal" composite substrate.
Historically, the first significant problem encountered in attempts to fabricate the ideal composite substrate was the substantial incursion of contaminants into an epitaxially deposited silicon layer. In particular, substantial concentrations of aluminum contaminants were found throughout the silicon epitaxial layer when Al.sub.2 O.sub.3 substrates were used. The inherent consequence of a high concentration of aluminum contaminants, effectively acting as acceptor-type impurities in the silicon epitaxial layer, is that there are unacceptably high leakage currents between the source and drain regions of p-channel active devices, such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) and MESFETs (MEtal Semiconductor FET). These leakage currents may be of sufficient magnitude that the p-channel active devices may be considered to be always in an "on", or conducting, state.
The incursion of substrate-originated contaminants into the silicon layer was found to be an inherent consequence of high temperature processing steps. Such steps are typically utilized in both the initial epitaxial deposition of the silicon layer and the subsequent annealing of the silicon layer to reduce crystalline defects contained therein. Thus, principally by trial and error, an approximate temperature of 910.degree. C. has become recognized as the maximum processing temperature that can be utilized without resulting in the substantial incursion of substrate-originated contaminants into the silicon layer.
By effectively precluding the use of high temperature annealing, a second problem was immediately realized. The crystalline quality of the silicon layer, as epitaxially deposited, was of insufficient quality to permit the fabrication of active devices therein. A process known as solid phase epitaxy (SPE) has been recently reported. See, S. S. Lau et al, "Improvement of Crystalline Quality of Epitaxial Si Layers by Ion Implantation Techniques", Applied Physics Letters, Vol. 34, No. 1, pp. 76-78, Jan. 1, 1979. The SPE process provides a low temperature subprocess for improving the crystallinity of the silicon epitaxial layer of a silicon-on-sapphire composite substrate. The SPE process involves the high energy implantation (typically at 250 keV to 600 keV) of an ion species, such as silicon, into the silicon epitaxial layer at a sufficient dose to create a substantially amorphous silicon layer lying adjacent the silicon/sapphire interface while leaving a substantially crystalline layer at the surface of the original epitaxial layer. The thickness of the silicon epitaxial layer is substantially that intended for the completed silicon-on-insulator composite substrate (typically 4000 .ANG. or greater). The ion species is implanted through the majority of the epitaxial layer so that the maximum disruption of the silicon crystal lattice is near, but not across, the silicon/sapphire interface to ensure that the amorphous region is adjacent the sapphire substrate. Throughout the ion implantation, the sapphire substrate is maintained at a very low temperature, reported as approximately that of liquid nitrogen (77.degree. K.). A single step low temperature (between 500.degree.-575.degree. C.) annealing of the composite substrate is then performed to convert the amorphous silicon layer into crystalline silicon. During this regrowth, the remaining crystalline surface portion of the silicon layer effectively acts as a nucleation seed so that the regrown portion of the silicon epitaxial layer has a common crystallographic orientation and is substantially free of crystalline defects.
While the SPE process does significantly improve the crystallinity of the silicon epitaxial layer, as a subprocess in the fabrication of silicon-on-insulator composite substrates, it also facilitates the incursion of insulator-originated contaminants into the silicon epitaxial layer. The contaminant concentration resulting from the use of the SPE process is, unfortunately, sufficient to preclude the practical use of integrated circuits fabricated on composite substrates processed with the SPE subprocess. The reasons for the failure of active devices to operate correctly are essentially the same as given above with regard to composite substrates fabricated utilizing high temperature processing steps.